1. Field of the Invention
This invention relates to computer circuits and, more particularly, to circuitry for generating computer system clock pulses.
2. History of the Prior Art
Typically, in prior art microprocessor-based computer systems, an input clock provided at a frequency controlled by a crystal oscillator is divided by two to provide symmetrical phase one and phase two clock pulses to operate the internal logic of the microprocessor. As the performance of microprocessor circuits has been pushed to ever higher frequencies, providing and distributing clock pulses resulting from a division of the crystal oscillator clock frequency by two has become more difficult. For example, a thirty-three MHz clock pulse requires an input clock frequency of sixty-six MHz from the crystal oscillator. Some of the system support logic has to operate at this sixty-six MHz frequency. Designing and manufacturing such circuitry is quite difficult and expensive. For this reason, it has been proposed that the frequency provided by the crystal oscillator be the same as the frequency for the clock pulses for the internal logic.
However, it is also advantageous that the newer designs of circuitry be based wherever possible on designs already utilized. This allows proven circuit designs to be used which are known to operate in a particular manner without idiosyncrasies; it shortens the design time and, consequently, lessens the cost of the circuitry. In order to utilize as much proven circuitry as possible, it is useful for a new microprocessor system derived from a family of microprocessors the internal circuitry of which operates two opposite phase clock pulses to continue to function in the same manner. Normally, one would expect that simply buffering the input clock frequency to generate the internal phase one and phase two signals would provide the required clock pulses. However, although the period of the clock cycle provided by a crystal clock oscillator may be very accurately determined, the duty cycle may not be so accurately determined. It has been found in practice that the duty cycle may vary by as much as five percent of the period leading to phase time variations of up to ten percent. This variation can reduce the performance of the system by the same amount.
An additional problem arises in some circuits for producing pulses at given frequencies. A two phase clock pulse generating circuit can operate in a condition producing harmonics or sub-harmonic frequencies of the pulses desired for the two phases, where the frequency of the phases is twice or just half that desired. Such a clock pulse generating circuit is not useful unless its tendency to produce harmonics or sub-harmonic frequencies of the pulses desired for the two phases can be eliminated.